(China (Mainland))
Product Summary
Load-Store Architecture With Non-Aligned
Support
64 32-Bit General-Purpose Registers
Instruction Packing Reduces Code Size
All Instructions Conditional
Additional C64x+? Enhancements
? Protected Mode Operation
? Exceptions Support for Error Detection
Parametrics
? NEON? SIMD Coprocessor
– High Performance Image, Video, Audio
(IVA2.2?) Accelerator Subsystem
? 430-MHz TMS320C64x+? DSP Core
? Tile Based Architecture Delivering 10
MPoly/sec
? Universal Scalable Shader Engine:
Multi-threaded Engine Incorporating
Pixel and Vertex Shader Functionality
Features
Industry Standard API Support:
OpenGLES 1.1 and 2.0, OpenVG1.0 and
Direct3D Mobile
? Fine Grained Task Switching, Load
Balancing, and Power Management
? Programmable High Quality Image
Anti-Aliasing
Fully Software-Compatible With C64x and
Diagrams
<FONT face=Verdana>Advanced Very-Long-Instruction-Word (VLIW)<BR>TMS320C64x+? DSP Core<BR>C Eight Highly Independent Functional Units<BR>? Six ALUs (32-/40-Bit), Each Supports<BR>Single 32-Bit, Dual 16-Bit, or Quad 8-Bit<BR>Arithmetic per Clock Cycle<BR>? Two Multipliers Support Four 16 x 16-Bit<BR>Multiplies (32-Bit Results) per Clock<BR>Cycle or Eight 8 x 8-Bit Multiplies (16-Bit<BR>Results) per Clock Cycle</FONT>
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
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 OMAP3530DCUS |
Texas Instruments |
Processors - Application Specialized App Processor |
Data Sheet |
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OMAP3530DCUS72 |
Texas Instruments |
Processors - Application Specialized Applications Proc |
Data Sheet |
Negotiable |
|
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|
OMAP3530DCUSA |
Texas Instruments |
Processors - Application Specialized App Processor |
Data Sheet |
Negotiable |
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